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author | Henner Zeller <h.zeller@acm.org> | 2023-10-15 08:14:19 -0700 |
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committer | Austin Seipp <aseipp@pobox.com> | 2023-10-16 10:15:08 -0500 |
commit | d3ae415ae2b2837f8d81297a1e9915da6614eb06 (patch) | |
tree | 3dfae95fe50deb35a2d33b95f79116efa13fb6a9 /pkgs/development/compilers/yosys/plugins/synlig.nix | |
parent | 19bc53adab95c341d34ccc8f01498e79ee43c024 (diff) | |
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yosys-synlig: init at 2023.10.12
Diffstat (limited to 'pkgs/development/compilers/yosys/plugins/synlig.nix')
-rw-r--r-- | pkgs/development/compilers/yosys/plugins/synlig.nix | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/pkgs/development/compilers/yosys/plugins/synlig.nix b/pkgs/development/compilers/yosys/plugins/synlig.nix new file mode 100644 index 00000000000..ccbf8815931 --- /dev/null +++ b/pkgs/development/compilers/yosys/plugins/synlig.nix @@ -0,0 +1,73 @@ +{ stdenv +, lib +, fetchFromGitHub +, pkg-config +, antlr4 +, capnproto +, readline +, surelog +, uhdm +, yosys +}: + +stdenv.mkDerivation (finalAttrs: { + pname = "yosys-synlig"; + version = "2023.10.12"; # Currently no tagged versions upstream + plugin = "synlig"; + + src = fetchFromGitHub { + owner = "chipsalliance"; + repo = "synlig"; + rev = "c5bd73595151212c61709d69a382917e96877a14"; + sha256 = "sha256-WJhf5gdZTCs3EeNocP9aZAh6EZquHgYOG/xiTo8l0ao="; + fetchSubmodules = false; # we use all dependencies from nix + }; + + patches = [ + ./synlig-makefile-for-nix.patch # Remove assumption submodules available. + ]; + + nativeBuildInputs = [ + pkg-config + ]; + + buildInputs = [ + antlr4.runtime.cpp + capnproto + readline + surelog + uhdm + yosys + ]; + + buildPhase = '' + runHook preBuild + make -j $NIX_BUILD_CORES build@systemverilog-plugin + runHook postBuild + ''; + + # Very simple litmus test that the plugin can be loaded successfully. + doCheck = true; + checkPhase = '' + runHook preCheck + yosys -p "plugin -i build/release/systemverilog-plugin/systemverilog.so;\ + help read_systemverilog" | grep "Read SystemVerilog files using" + runHook postCheck + ''; + + installPhase = '' + runHook preInstall + mkdir -p $out/share/yosys/plugins + cp ./build/release/systemverilog-plugin/systemverilog.so \ + $out/share/yosys/plugins/systemverilog.so + runHook postInstall + ''; + + meta = with lib; { + description = "SystemVerilog support plugin for Yosys"; + homepage = "https://github.com/chipsalliance/synlig"; + license = licenses.asl20; + maintainers = with maintainers; [ hzeller ]; + platforms = platforms.all; + }; +}) |