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| author | yvt <i@yvt.jp> | 2022-05-23 09:52:36 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-05-22 20:52:36 -0400 |
| commit | bf139d83eca3ef5442aa875458193d44ddf9dc6c (patch) | |
| tree | 8a798cf0dde9a37146c3597fe8ed4706379060ad /lib/systems | |
| parent | 66782715d8e56e8ce7ef5bc32799554d668120f6 (diff) | |
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systems: support cross-compiling for Renesas RX microcontrollers (#173858)
Diffstat (limited to 'lib/systems')
| -rw-r--r-- | lib/systems/doubles.nix | 3 | ||||
| -rw-r--r-- | lib/systems/examples.nix | 5 | ||||
| -rw-r--r-- | lib/systems/inspect.nix | 1 | ||||
| -rw-r--r-- | lib/systems/parse.nix | 1 |
4 files changed, 9 insertions, 1 deletions
diff --git a/lib/systems/doubles.nix b/lib/systems/doubles.nix index 3cdebbc07c1..90a6eb9f35c 100644 --- a/lib/systems/doubles.nix +++ b/lib/systems/doubles.nix @@ -41,7 +41,7 @@ let # none "aarch64_be-none" "aarch64-none" "arm-none" "armv6l-none" "avr-none" "i686-none" "msp430-none" "or1k-none" "m68k-none" "powerpc-none" "powerpcle-none" - "riscv32-none" "riscv64-none" "s390-none" "s390x-none" "vc4-none" + "riscv32-none" "riscv64-none" "rx-none" "s390-none" "s390x-none" "vc4-none" "x86_64-none" # OpenBSD @@ -76,6 +76,7 @@ in { riscv = filterDoubles predicates.isRiscV; riscv32 = filterDoubles predicates.isRiscV32; riscv64 = filterDoubles predicates.isRiscV64; + rx = filterDoubles predicates.isRx; vc4 = filterDoubles predicates.isVc4; or1k = filterDoubles predicates.isOr1k; m68k = filterDoubles predicates.isM68k; diff --git a/lib/systems/examples.nix b/lib/systems/examples.nix index 997a7a8c273..170db6fb9fa 100644 --- a/lib/systems/examples.nix +++ b/lib/systems/examples.nix @@ -145,6 +145,11 @@ rec { libc = "newlib"; }; + rx-embedded = { + config = "rx-none-elf"; + libc = "newlib"; + }; + msp430 = { config = "msp430-elf"; libc = "newlib"; diff --git a/lib/systems/inspect.nix b/lib/systems/inspect.nix index 27c25deafec..00cbe4f012c 100644 --- a/lib/systems/inspect.nix +++ b/lib/systems/inspect.nix @@ -26,6 +26,7 @@ rec { isRiscV = { cpu = { family = "riscv"; }; }; isRiscV32 = { cpu = { family = "riscv"; bits = 32; }; }; isRiscV64 = { cpu = { family = "riscv"; bits = 64; }; }; + isRx = { cpu = { family = "rx"; }; }; isSparc = { cpu = { family = "sparc"; }; }; isWasm = { cpu = { family = "wasm"; }; }; isMsp430 = { cpu = { family = "msp430"; }; }; diff --git a/lib/systems/parse.nix b/lib/systems/parse.nix index 3ceddbb599b..bf436ec8db5 100644 --- a/lib/systems/parse.nix +++ b/lib/systems/parse.nix @@ -116,6 +116,7 @@ rec { alpha = { bits = 64; significantByte = littleEndian; family = "alpha"; }; + rx = { bits = 32; significantByte = littleEndian; family = "rx"; }; msp430 = { bits = 16; significantByte = littleEndian; family = "msp430"; }; avr = { bits = 8; family = "avr"; }; |