From 7434c0002022541f34a929d9a8e3bfaaf4dfc2d9 Mon Sep 17 00:00:00 2001 From: Zhuocheng Ding Date: Mon, 2 Dec 2019 15:50:10 +0800 Subject: crosvm: PIT: use full address and avoid conflict The PIT implementation has the assumption that addresses are I/O port numbers, so we should use full address mode. i8042 is also changed to full address mode to avoid the conflict on port 0x61. BUG=chromium:908689 TEST=None Change-Id: Ibbb851e3a46ac7fc71576990a1618196de92e33c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1945794 Commit-Queue: Zhuocheng Ding Reviewed-by: Daniel Verkamp Reviewed-by: Stephen Barber Tested-by: kokoro --- devices/src/i8042.rs | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'devices/src/i8042.rs') diff --git a/devices/src/i8042.rs b/devices/src/i8042.rs index 1f8a837..dfedbf2 100644 --- a/devices/src/i8042.rs +++ b/devices/src/i8042.rs @@ -19,17 +19,16 @@ impl I8042Device { } // i8042 device is mapped I/O address 0x61. We partially implement two 8-bit -// registers: port 0x61 (I8042_PORT_B_REG, offset 0 from base of 0x61), and -// port 0x64 (I8042_COMMAND_REG, offset 3 from base of 0x61). +// registers: port 0x61 (I8042_PORT_B_REG), and port 0x64 (I8042_COMMAND_REG). impl BusDevice for I8042Device { fn debug_label(&self) -> String { "i8042".to_owned() } fn read(&mut self, offset: u64, data: &mut [u8]) { - if data.len() == 1 && offset == 3 { + if data.len() == 1 && offset == 0x64 { data[0] = 0x0; - } else if data.len() == 1 && offset == 0 { + } else if data.len() == 1 && offset == 0x61 { // Like kvmtool, we return bit 5 set in I8042_PORT_B_REG to // avoid hang in pit_calibrate_tsc() in Linux kernel. data[0] = 0x20; @@ -37,7 +36,7 @@ impl BusDevice for I8042Device { } fn write(&mut self, offset: u64, data: &[u8]) { - if data.len() == 1 && data[0] == 0xfe && offset == 3 { + if data.len() == 1 && data[0] == 0xfe && offset == 0x64 { if let Err(e) = self.reset_evt.write(1) { error!("failed to trigger i8042 reset event: {}", e); } -- cgit 1.4.1