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path: root/devices/src/pci
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* recursive deserializationAlyssa Ross2020-06-15
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* recursive serializationAlyssa Ross2020-06-15
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* get_device_capsAlyssa Ross2020-06-15
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* get_device_barsAlyssa Ross2020-06-15
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* Merge remote-tracking branch 'origin/master'Alyssa Ross2020-06-14
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| * hypervisor: add Vm user memory region functionsSteven Richman2020-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The separate Vm functions for MemoryMappings and MemoryMappingArenas have been combined and now use a MappedRegion trait that the mappings implement. msync_memory_region replaces the get_mmap_arena function, which is used by VmMsyncRequest. Since Vm uses mutexes for cloning, it can't return mem region references. BUG=chromium:1077058 TEST=cargo test, cargo test -p sys_util, cargo test -p hypervisor Change-Id: If257b16ee34d07820ae7ebdb9a3a598a41df013c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2202845 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Gurchetan Singh <gurchetansingh@chromium.org>
* | Merge remote-tracking branch 'origin/master'Alyssa Ross2020-06-14
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| * pci: ac97: Fix unused import warningDylan Reid2020-06-01
| | | | | | | | | | | | | | | | | | | | The Error type is not used, remove it. Change-Id: Ibcc1328b62635dd62a666412eb0f56a8c2f4fc93 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2224013 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Commit-Queue: Dylan Reid <dgreid@chromium.org> Tested-by: Dylan Reid <dgreid@chromium.org>
| * ac97: Uses audio_streams::BoxErrorJudy Hsiao2020-06-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | audio_streams export BoxError which can be passed between threads. Adopts the API change accordingly. BUG=b:149437381 TEST=emerge-{BOARD} crosvm Cq-Depend: chromium:2215772 Change-Id: I524e9d7ab3c16b7b6d3714187f166dce72d243cb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2214971 Tested-by: Judy Hsiao <judyhsiao@chromium.org> Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> Commit-Queue: Judy Hsiao <judyhsiao@chromium.org>
* | Merge remote-tracking branch 'origin/master'Alyssa Ross2020-05-10
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| * pci: refactor FDT/MPTABLE creation to use PciAddress.Tomasz Jeznach2020-05-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simple refactor of FDT and MPTables generation to use PCI device addressing and allow declatation of non-zero PCI bus ids for x86 architectures. It also allows non sequential IRQ allocation for PCI devices. BUG=None TEST=build_test & tast run crostini.Sanity Change-Id: I6cc31ce412199a732499b2d8d18d99f08d765690 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2175739 Tested-by: Tomasz Jeznach <tjeznach@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
| * devices: pci: refactor PCI devices to use PciAddress.Tomasz Jeznach2020-05-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Simple refactor of PCI device addressing to use PciAddress type providing bus:device.function number. BUG=None TEST=build_test & tast run crostini.Sanity Change-Id: I7755ad6b31aa8c882475cd8212630e1cc86ef49e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2172766 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
| * devices: pci: refactor device location address.Tomasz Jeznach2020-04-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simple refactor of PCI device addressing to use bus:device:function notation, including change allowing sparse alloction of device addresses in PCI topology. BUG=None TEST=build_test && cargo test Change-Id: I9ff02dd6b67b6784eac8c3d348661789fca3f422 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2171037 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Tested-by: Tomasz Jeznach <tjeznach@chromium.org> Commit-Queue: Tomasz Jeznach <tjeznach@chromium.org>
| * ac97: Create CrasClient with unified socketpaulhsia2020-04-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since Termina and ARCVM need both playback and capture functionalities, we create CrasClient with CrasSocketType::Unified. BUG=b:155048379 TEST=Apply full patch set and test with VMs Cq-Depend: chromium:2165697 Cq-Depend: chromium:2167813 Change-Id: Id4fb12423eb05859528406ae7ed5e62b46909a56 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2167312 Reviewed-by: Dylan Reid <dgreid@chromium.org> Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Commit-Queue: Chih-Yang Hsia <paulhsia@chromium.org>
| * Remove redundant single-component importsDaniel Verkamp2020-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix clippy 1.43.0 clippy::single-component-path-imports warnings. BUG=None TEST=bin/clippy Change-Id: I3f4f54138bedce16dc1ca937bb8bc00a94594f69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2163203 Reviewed-by: Zach Reizner <zachr@chromium.org> Tested-by: Daniel Verkamp <dverkamp@chromium.org> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
* | crosvm: collapse simple boolean matchesAlyssa Ross2020-04-11
| | | | | | | | | | Rust 1.42 introduces matches!(), which can be used to collapse simple match statements like these.
* | Merge remote-tracking branch 'origin/master'Alyssa Ross2020-04-10
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| * ac97: Set CRAS_CLIENT_TYPE_CROSVM for crosvmpaulhsia2020-04-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set client type for debug log and ucm. BUG=b:140401362 TEST=Build, deploy and run `aplay -f dat /dev/zeros` and check `cras_test_client --dump_a` results Change-Id: I2b040ddaaafe0b7d6e7c3a6f3973598d0a79ff82 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2142836 Reviewed-by: Dylan Reid <dgreid@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Commit-Queue: Chih-Yang Hsia <paulhsia@chromium.org>
| * handle mmap of large offsets on 32 bit systemsDylan Reid2020-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While only 32 bits of address can be mapped, that 32 bits can be offset by further than 32 bits in to a large file. As chirantan points out, the try_mmap call was already casting the usize to u64 on all architectures. Convert the usize offset in mmap to u64 and address users of the API as well. Change-Id: I67aed928ea521049fb51eb7aa61ea4de8b4d096c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2124879 Reviewed-by: Dylan Reid <dgreid@chromium.org> Tested-by: Dylan Reid <dgreid@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Dylan Reid <dgreid@chromium.org>
* | Merge remote-tracking branch 'origin/master'Alyssa Ross2020-03-26
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| * vhost-net: implement direct msix irq fdChuanxiao Dong2020-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current vhost-net msix irq injection flow is from vhost-kernel to crosvm vhost-net, then to the KVM for irq injection. It still need crosvm vhost-net to trigger irq, which is because the set_vring_call is not directly using the msix irq fd. To optimize this flow to be from vhost-kernel to KVM directly, need: 1. if the msix is enabled and unmasked, use the misx irq fd for the vring_call directly so that all the misx injection can directly to KVM from vhost-kernel. 2. if the msix is disabled or masked, use the indirect vhost_interrupt fd to let the crosvm to control the irq injection. BUG=None TEST=cargo test -p devices TEST=start crosvm with vhost-net, and run the iperf3 on the network without any issue Change-Id: Idb3427f69f23b728305ed63d88973156a03e7c6b Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2046452 Reviewed-by: Stephen Barber <smbarber@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com>
| * audio: Create AC97 device with --ac97 optionJudy Hsiao2020-03-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Replace --cras-audio, --cras-capture, null-audio options by --ac97 option to create audio devices. 2. "--ac97 backend=BACKEND\ [capture=true,capture_effect=EFFECT]" is comma separated key=value pairs for setting up Ac97 devices. It can be given more than once to create multiple devices. Possible key values are: backend=(null, cras) - Where to route the audio device. `null` for /dev/null, and cras for CRAS server. capture=true - Enable audio capture. capture_effects - | separated effects to be enabled for recording. The only supported effect value now is EchoCancellation or aec. BUG=b:140866281 TEST=1.crosvm run -r ./vm_rootfs.img -c 4 -m 1024 -s /run --cid 5 --host_ip\ 100.115.92.25 --netmask 255.255.255.252 --ac97\ backend=cras,capture=true,capture_effect=aec\ --mac d2:47:f7:c5:9e:53 ./vm_kernel 2. Record with the vm by: arecord -D hw:0,0 -d5 -fS16_LE -c2 -r48000 /tmp/test.mp3 3. Verify that AEC is enabled within the recording stream by cras_test_cleint. Cq-Depend: chromium:2053654 Cq-Depend: chromium:2095644 Cq-Depend: chromium:2038221 Change-Id: Ia9e0e7cda1671a4842ec77a354efaa4a2dc745eb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2038413 Tested-by: Judy Hsiao <judyhsiao@chromium.org> Commit-Queue: Judy Hsiao <judyhsiao@chromium.org> Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org> Auto-Submit: Judy Hsiao <judyhsiao@chromium.org>
* | devices: add missing PCI derivesAlyssa Ross2020-03-17
|/ | | | | | A lot of the PCI types had some derives missing that it would be quite clearly beneficial to add, and I think it's better to add them all now than piecemeal as required.
* ac97: Mark pci::ac97_bus_master::test::start_playback ignoredMattias Nissler2020-03-06
| | | | | | | | | | | | | | | | The test is flaky and causes continuous build failures. BUG=chromium:1058881 TEST=Tests run, offending test is listed as ignored. Exempt-From-Owner-Approval: Sheriff action to silence flakes on builders Change-Id: I204e6ef548e6f203b0c15b0d01fde3b88660bd44 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2090414 Reviewed-by: Mattias Nissler <mnissler@chromium.org> Commit-Queue: Mattias Nissler <mnissler@chromium.org> Tested-by: Mattias Nissler <mnissler@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com>
* Vfio: multi vfio group supportXiong Zhang2020-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | current one container contains one group only, but one container could contain multi groups actually. The main gap that current code to support multi groups is that container will be initialized multi times when multi groups exist, as each group will initialize container one time. This patch extracts the code which should run one time only on a container, so when the first group is added into container, this container initialize code will run once. The container once initialize code contains: a. Set iommu driver type as VfioType1V2 b. Setup Iommu table on each guest memory region c. create vfio_kvm device, so kernel kvm and vfio is associated. BUG=chromium:992270 TEST=passthrough two/three vfio devices into guest, these devices belong to different vfio groups, then check these devices function in guest. Change-Id: I94c9c86f70f49957a5e5c1dfd2c7d823ad042320 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2078970 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com>
* ac97: switch to ShmStreamSourceFletcher Woodruff2020-02-28
| | | | | | | | | | | | | | | | | | | | | Convert playback and capture for the AC97 device to use the zero-copy ShmStreamSource instead of the old StreamSource. In the process, rework start_playback and start_capture unit tests so they rely less on sleep statements. BUG=chromium:968724 BUG=chromium:1006035 TEST="sox -n -r 48000 -b 16 output.raw synth 5 sine 330 && aplay -f dat output.raw" within a VM, check that sine wave is played accurately. Change-Id: Ie9cddbc5285a9505872c9951a8a1da01de70eb88 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1749950 Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Fletcher Woodruff <fletcherw@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org> Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org>
* devices: pci: add error handling for msix_enableDaniel Verkamp2020-02-27
| | | | | | | | | | | | | | | | | | | | This more gracefully handles failure of msix_enable; in particular, if it fails, the self.enabled state is returned to false so that future device operations won't try to access uninitialized parts of self.irq_vec. In addition, the AddMsiRoute response is now checked (previously, it was just ignored), and errors are bubbled up via MsixError rather than just printing a message. BUG=chromium:1041351 TEST=Boot Crostini on nami Change-Id: I9999f149817bc9f49176487446b52e74fb8be9a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2067964 Reviewed-by: Dylan Reid <dgreid@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
* Vfio: Disable msix bar's mmapXiong Zhang2020-02-21
| | | | | | | | | | | | | | | | | If vfio device's bar is mmappable, vcpu could access it directly through ept without trapping. But msix's table and pba exist on pci bar, they must be trapped and emulated by crosvm, so these bars mmappable must be disabled. BUG=chromium:992270 TEST=pass through a device with msix cap to guest, then test device function in guest. Change-Id: If7504a924902c940e00cc759c1ca64a116bbca17 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1987815 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* Vfio: Emulate MSI-xXiong Zhang2020-02-20
| | | | | | | | | | | | | | | | | When VFIO device have msix capability, vfio kernel doesn't emulate msix, so all the msix emulation are handled by crosvm. This include msix capability register read/write, msix table read/write, msix pba table read/write. BUG=chromium:992270 TEST=passthrough a device with msix capabilty to guest, and check device msix function in guest Change-Id: Ic39737662a5051ac6b9e29aad227d3d4946190a8 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1987814 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* Vfio: Enable multi vectors in irq_enable()Xiong Zhang2020-02-19
| | | | | | | | | | | | | | | When msix is enabled, msix will have multi vectors, this patch enable mutlti vectors in vfio_device.irq_enable() function. BUG=chromium:992270 TEST=passthrough a device with msix capability to guest, and check device msix function in guest Change-Id: I5f8265e7badec8551ff9a974462f08425ee93ab2 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1987813 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* Vfio: Create Msix capability for vfio deviceXiong Zhang2020-02-12
| | | | | | | | | | | | | | | | | | | | Loop vfio device config register, then find out the msi and msix pci capability. both msi and msix need IrqRequestSocket for adding its routing info into kvm routing table, but vfio device has one IrqRequestSocket only, and only msi or msix is enabled at runtime, so Arc is used to let msi and msix share one device IrqRequestSocket. BUG=chromium:992270 TEST=pass a device with msix capability to guest, and check device msix function in guest Change-Id: I008ccd0e98507dc4d587418fbe00aa23029bdbad Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1987812 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* devices: pci: fix writable_bits for 64-bit BARsDaniel Verkamp2020-02-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The high 32 bits of writable_bits was set incorrectly when adding 64-bit memory BARs to PciConfiguration: it would effectively always be all zeroes (no writable bits) instead of all ones (all writable bits). The writable_bits field is used to determine which bits to force to 0 when reading the BAR, which is used by the guest to determine the size of a BAR: write an all-ones value to the BAR, read it back, and the resulting value has only the writable bits still set. Since PCI BARs must be a power of two in size, the effective size of the BAR is the bitwise inverse of the resulting value plus one. For 64-bit BARs, this process is the same, except that two contiguous 32-bit registers are combined, so for a 4096-byte 64-bit BAR, the writable_bits field should be 0xFFFFFFFF_FFFFF000; however, with the previous (buggy) code, it was 0x00000000_FFFFF000. Add checks to the unit tests to verify that the writable_bits field is correctly calculated as well. BUG=None TEST=cargo test -p devices pci_configuration TEST=Boot Linux 4.19 kernel in crosvm Change-Id: Ib97aa5dccf9bf042328c0fc9defe1797fc67bb05 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2033620 Reviewed-by: Dylan Reid <dgreid@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
* Vfio: Ignore vfio device's multifunction flagXiong Zhang2020-01-07
| | | | | | | | | | | | | | | | | | PciRoot doesn't support multifunciion which forward pci config r/w from function > 0 to function 0, so if the vfio device have multifunction flag, guest will find the existence of all the other functions, actually it is from the function 0. In order to fix these extra functions, this patch clear the multifunction flag, so guest won't probe the other functions. BUG=chromium:992270 TEST=pass through a device with multifunction into guest Change-Id: I395636411e0d7d2a3729de16e638d7f6b2dde552 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1954221 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* Vfio: Add igd Opregion supportXiong Zhang2020-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | igd opregion is used by igd driver to get vbt info and exhange info between bios and driver, but it isn't a standard pci resource, host bios allocate, reserve its memory, and report the memory base address through cfg_register 0xFC on native. As crosvm doesn't have bios, it is hard to allocate and reserve opregion for guest. Here opregion is faked as mmio memory, and let crosvm allocate guest memory from mmio space, report its base to cfg_register 0xFC also. guest driver read cfg_register 0xFC to get opregion base address, then rw it throgh this address. Read is forwarded to vfio kernel and write is ignored. BUG=chromium:992270 TEST=crosvm --vfio /sys/devices/pci0000:00/0000:00:02.0, pass through host igd into linux guest, the physical local display lightup and show linux desktop. Change-Id: I1cc3618e99313fc1f88b96dcbc635f090b19340c Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1688689 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* vfio: Disable igd stolen memoryXiong Zhang2019-12-17
| | | | | | | | | | | | | | | | igd stolen memory isn't a standard pci resource, so guest couldn't access it. Once guest i915 driver see its size is zero, i915 won't use it. Here sotlen memory's size register PciCfg 0x51 is forced to zero. BUG=chromium:992270 TEST=crosvm run --vfio=/sys/devices/pci0000:00/0000:00:02.0, pass through host igd into linux guest. The physical local display lightup and show linux desktop. Change-Id: I1a0a6edda5d92d32307ea8025ef96677ca62c125 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1688368 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* ac97: bus_master: Check pi_info before warm resetpaulhsia2019-12-11
| | | | | | | | | | | | | | | According to ac97 spec, warm reset is specified to no-op when the device is running. We should ignore it while the device is recording audio as well. BUG=chromium:1026538 TEST=Build Change-Id: I64be922149c90be9a7a8669ef6d56591e6de632b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1960058 Reviewed-by: Dylan Reid <dgreid@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Chih-Yang Hsia <paulhsia@chromium.org>
* ac97: extract moving to next buffer into functionFletcher Woodruff2019-12-11
| | | | | | | | | | | | | | | | | | | Create a function move_to_next_buffer which handles incrementing civ and piv properly. Set the PICB register when that function is called, not when we read a guest buffer. BUG=chromium:968724 TEST=playback on-device Change-Id: Ib384efceeac4be0e056c20591d93fe32b7305db6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1954207 Reviewed-by: Fletcher Woodruff <fletcherw@chromium.org> Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org> Commit-Queue: Fletcher Woodruff <fletcherw@chromium.org> Tested-by: Fletcher Woodruff <fletcherw@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com>
* vfio: Implement bar mappableXiong Zhang2019-12-06
| | | | | | | | | | | | | | | | | | if device bar is mappable, map bar's gpa to hpa in EPT, guest vcpu could access this bar directly through EPT without trapping. This could improve performance. vm.add_mmio_memory could help do this, here vfio_pci send RegisterMmapMemory request through vm_control socket to do this. BUG=chromium:992270 TEST=none Change-Id: I3b4274372f7dcd32e18084d55f037b6fe45ed422 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1581147 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* devices: virtio: enable MSI-X for all devicesDaniel Verkamp2019-12-06
| | | | | | | | | | | | | | | | | | All virtio devices can use the same generic calculation for number of MSI-X vectors required: number of queues plus one for configuration changes. Move this calculation to the VirtioPciDevice implementation and remove the Option to unconditionally enable MSI-X support for all PCI virtio devices. BUG=chromium:854765 TEST=Verify all virtio interrupts in /proc/interrupts are PCI-MSI Change-Id: I5905ab52840e7617b0b342ec6ca3f75dccd16e4d Signed-off-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1925169 Reviewed-by: Zide Chen <zide.chen@intel.com> Reviewed-by: Dylan Reid <dgreid@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com>
* ac97: combine PlaybackError and CaptureErrorFletcher Woodruff2019-12-04
| | | | | | | | | | | | | | PlaybackError and CaptureError encode the same error cases. Combine the two into one Error type, AudioError. BUG=None TEST=builds Change-Id: I44259227d67a0284c9a11c4aafd86fafe1006f8b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1925727 Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Fletcher Woodruff <fletcherw@chromium.org>
* ac97: bus_master: Sync SR_CELV with civ == lvipaulhsia2019-11-21
| | | | | | | | | | | | | | | | | | | | | From ac97 spec, SR_CELV should be synced with civ == lvi in bus_master. intel8x0 is not using the bit but some other driver or system might be using it. Remove checking if new_sr equals to old_sr since update_sr will do nothing if the input value equals to the old sr value. Add unit tests steps to test the expected results. BUG=chromium:1026538 TEST=Unit tests Change-Id: I3dc9f42e2beed8e635a65dbefba44677c73fcc5b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1925917 Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Dylan Reid <dgreid@chromium.org> Reviewed-by: Dylan Reid <dgreid@chromium.org>
* ac97: bus_master: CR: Clean up reset registers optpaulhsia2019-11-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In bus_master control register (CR), reset registers (RR) operation is refactored by: - Don't call stop_audio(), since the bus master should always be in stop state while getting this control. (From AC'97 spec: Setting it when the Run bit is set will cause undefined consequences."). And the driver will always disable the audio first by setting 0 to CR_RPBM bit. - While doing the registers reset, clean up sr by using update_sr since assigning 0 to sr directly won't unset the interrupt bit in global status register and the driver might go into snd_intel8x0_update() with a stopped substream. - Introduce helper function - reset_func_regs() Add steps in unit tests which - Start the bus masters with "Interrupt on Completion Enable" (CR_IOCE) bit. - Verify if the interrupt bit in global status register is set / unset. BUG=chromium:1026538 TEST=Unit tests Change-Id: Ie90ca4c82cc3c867992ecaeb61ef4b3e9dd0d079 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1925916 Reviewed-by: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: Chih-Yang Hsia <paulhsia@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Dylan Reid <dgreid@chromium.org>
* devices: update the msix route table regardless msix mask statusChuanxiao Dong2019-11-18
| | | | | | | | | | | | | | | | | | | The msix entries might be changed by guest during msix maksed. The current implementation won't update the MSIX route table in this case which can cause KVM still inject the IRQ according to the old routing. To fix this, we should update the msix route regardless the msix mask status. BUG=chromium:1023692 TEST=cargo test -p devices Change-Id: Ifa356b3834ff454ecfca1dbdd97a7ca940d1f2b6 Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1911721 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-by: Zide Chen <zide.chen@intel.corp-partner.google.com> Tested-by: kokoro <noreply+kokoro@google.com>
* devices: pci: make get_bar_addr work for all BAR typesDaniel Verkamp2019-11-17
| | | | | | | | | | | | | | | Previously, PciConfiguration::get_bar_addr would only correctly return the value of a 32-bit memory region; implement support for the other valid BAR types as well. BUG=None TEST=cargo test -p devices Change-Id: I221187dfb96b31d7fead73eccf605a0886021d8b Signed-off-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1880164 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Dylan Reid <dgreid@chromium.org>
* Vfio: Suitably allocate bar for vfio deviceXiong Zhang2019-11-11
| | | | | | | | | | | | | Use 64bit flag in vfio device's bar to get correct mmio allocator. BUG=chromium:992270 TEST=none Change-Id: I8f3dab48eb6dc0b92071803aa3526cadda8034c7 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1581143 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Zach Reizner <zachr@chromium.org>
* resource: Rename device memory to mmioXiong Zhang2019-11-10
| | | | | | | | | | | | | | Since unified allocator is used to allocate mmio, this patch remove the device memory name, and rename device to mmio. BUG=chromium:992270 TEST=this patch doesn't change function, run build_test Change-Id: I234b0db4b3c5de8cfee372ace5212a980564d0c7 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1895234 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* Resource: Unify mmio allocatorXiong Zhang2019-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | Current mmio and device two allocators exist, the purpose to define two allocator is: Accessing to gpa from mmio allocator cause vm exit, while gpa from device allocator doesn't cause vm exit. Whether vm exits exist or not, dependency on whether vm->add_device_memory() is called with gpa from allocator or not.Even if gpa is from mmio alloator, and vm->add_device_memory() is called with this gpa, accessing this gpa won't cause vm exit. So mmio allocator and device allocator couldn't guarantee the original purpose. This patch unify mmio allocator and device allocator into one mmio allocator. BUG=chromium:992270 TEST=this patch doesn't change function, so just run build_test Change-Id: If87d5c2838eb122ef627fa45c394b1b3ccfafeb0 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1895233 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Zach Reizner <zachr@chromium.org> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* vfio: Add vfio msi routing information into kvmXiong Zhang2019-10-29
| | | | | | | | | | | | | | | | When vfio device msi is enabled, use VmIrqRequest->AllocateOneMsi() to allocate one gsi for a msi vector, and link gsi with irqfd through vm->register_irqfd, use VmIrqRequest->AddMsiRoute() to add msi routing info into kvm route table. BUG=chromium:992270 TEST=none Change-Id: I5e2d2347e5e26f0ef6e12554dae4b12934b65e82 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1581146 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com>
* vfio: Intx supportXiong Zhang2019-10-28
| | | | | | | | | | | | | | | | | | When hw reports it could support INTX, this patch enable it by passing irqfd into vfio kernel. Then once hw intx happens, the vfio kernel irq handler receives and handles it, the handler will trigger irqfd and kvm injects the interrupt into guest. BUG=chromium:992270 TEST=None Change-Id: I8b200174a91183b7324b0044fde13b44c751d4d7 Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1813457 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
* devices: enable MSI-X for virtio-net and viotio-block devicesXiong Zhang2019-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - signal_used_queue(): trigger MSI-X interrupts to the guest if MSI-X is enabled, otherwise trigger INTx interrupts - enable MSI-X on vhost-net: allocate one vhost_interrupt for every MSI-X vector. Performance wise, fio random R/W test on eve pixelbook: INTx MSI-X delta fio write 8.13MiB/s 9.79MiB/s +1.66MiB/s (+20%) fio read 24.35MiB/s 29.3MiB/s +4.95MiB/s (+20%) For networking performance (TCP stream), test results on eve pixelbook: INTx MSI-X delta iperf3 5.93Gbits/s 6.57Gbits/s +0.64Gbits/s (+10.7%) iperf3 -R 5.68Gbits/s 7.37Gbits/s +1.30Gbits/s (+22.8%) iperf test results on VM launched from Ubuntu host (client sends only): INTx MSI-X delta virtio-net 9.53Gbits/s 11.4 Gbits/s +1.87Gbits/s (+19.5%) vhost 28.34Gbits/s 44.43Gbits/s +16.09Gbits/s (+56.7%) BUG=chromium:854765 TEST=cargo test -p devices TEST=tested virtio-net and block on Linux VM and eve pixelbook Change-Id: Ic4952a094327e6b977f446def8209ea2f796878c Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.corp-partner.google.com> Signed-off-by: Zide Chen <zide.chen@intel.corp-partner.google.com> Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1828340 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-06-09 07:54:00 +0000