diff options
author | Zide Chen <zide.chen@intel.corp-partner.google.com> | 2019-09-13 14:21:05 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2019-10-24 20:46:37 +0000 |
commit | 1d15851b275b72aa08d13ac7bde9dd8464cfeed0 (patch) | |
tree | cd2eaa677385f881b8bf472d16a8836e3e1b225d /tpm2 | |
parent | 1955fd1fb317841ecdf31666a5d88021670ae035 (diff) | |
download | crosvm-1d15851b275b72aa08d13ac7bde9dd8464cfeed0.tar crosvm-1d15851b275b72aa08d13ac7bde9dd8464cfeed0.tar.gz crosvm-1d15851b275b72aa08d13ac7bde9dd8464cfeed0.tar.bz2 crosvm-1d15851b275b72aa08d13ac7bde9dd8464cfeed0.tar.lz crosvm-1d15851b275b72aa08d13ac7bde9dd8464cfeed0.tar.xz crosvm-1d15851b275b72aa08d13ac7bde9dd8464cfeed0.tar.zst crosvm-1d15851b275b72aa08d13ac7bde9dd8464cfeed0.zip |
devices: implement msix capability structure
The MSI-X feature is ported from Cloud-hypervisor commit 69e27288a2e. (https://github.com/intel/cloud-hypervisor.git) In this commit: - add a new "msix" module to the pci crate. - implement the MSI-X Capability Structure. - implement per virtio device msix_vectors() function which represents the supported MSI-X vector for this device. BUG=chromium:854765 TEST=launch Crosvm on eve and Linux TEST=cargo test -p devices TEST=./bin/clippy TEST=./build_test.py --x86_64-sysroot /build/eve Change-Id: I5498b15a3bf115e34764e6610407b3ba204dae7f Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> Signed-off-by: Zide Chen <zide.chen@intel.corp-partner.google.com> Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/1873356 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Stephen Barber <smbarber@chromium.org>
Diffstat (limited to 'tpm2')
0 files changed, 0 insertions, 0 deletions