devices: irqchip: KvmKernelIrqchip x86_64 impl

Implemented get/set_pic/ioapic/pit functions for the KvmKernelIrqchip.
Added respective functions on KvmVm for interacting with the underlying
KVM API.

Added associated tests for get/set functions.

BUG=chromium:1077058
TEST=ran devices tests and added get/set function tests

Change-Id: I66a29828fe2f1fbdf54d7325656a003ac09e36d0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2219422
Reviewed-by: Udam Saini <udam@google.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Colin Downs-Razouk <colindr@google.com>

2 files changed, 178 insertions, 16 deletions

diff --git a/devices/src/irqchip/kvm/mod.rs b/devices/src/irqchip/kvm/mod.rs
index bdc9d3f..a5fd89f 100644
--- a/devices/src/irqchip/kvm/mod.rs
+++ b/devices/src/irqchip/kvm/mod.rs
@@ -19,15 +19,18 @@ use crate::IrqChip;
 ///
 /// This implementation will use the KVM API to create and configure the in-kernel irqchip.
 pub struct KvmKernelIrqChip {
-    _vm: KvmVm,
+    vm: KvmVm,
     vcpus: Arc<Mutex<Vec<Option<KvmVcpu>>>>,
 }
 
 impl KvmKernelIrqChip {
     /// Construct a new KvmKernelIrqchip.
     pub fn new(vm: KvmVm, num_vcpus: usize) -> Result<KvmKernelIrqChip> {
+        // TODO (colindr): this constructor needs aarch64 vs x86_64 implementations because we
+        //  want to use vm.create_device instead of create_irq_chip on aarch64
+        vm.create_irq_chip()?;
         Ok(KvmKernelIrqChip {
-            _vm: vm,
+            vm,
             vcpus: Arc::new(Mutex::new((0..num_vcpus).map(|_| None).collect())),
         })
     }
diff --git a/devices/src/irqchip/kvm/x86_64.rs b/devices/src/irqchip/kvm/x86_64.rs
index 6f59935..acede53 100644
--- a/devices/src/irqchip/kvm/x86_64.rs
+++ b/devices/src/irqchip/kvm/x86_64.rs
@@ -4,30 +4,30 @@
 
 use hypervisor::kvm::KvmVcpu;
 use hypervisor::{IoapicState, LapicState, PicSelect, PicState, PitState};
-
+use kvm_sys::*;
 use sys_util::Result;
 
 use crate::{Bus, IrqChipX86_64, KvmKernelIrqChip};
 
 impl IrqChipX86_64<KvmVcpu> for KvmKernelIrqChip {
     /// Get the current state of the PIC
-    fn get_pic_state(&self, _select: PicSelect) -> Result<PicState> {
-        unimplemented!("get_pic_state for KvmKernelIrqChip is not yet implemented");
+    fn get_pic_state(&self, select: PicSelect) -> Result<PicState> {
+        Ok(PicState::from(&self.vm.get_pic_state(select)?))
     }
 
     /// Set the current state of the PIC
-    fn set_pic_state(&mut self, _select: PicSelect, _state: &PicState) -> Result<()> {
-        unimplemented!("set_pic_state for KvmKernelIrqChip is not yet implemented");
+    fn set_pic_state(&mut self, select: PicSelect, state: &PicState) -> Result<()> {
+        self.vm.set_pic_state(select, &kvm_pic_state::from(state))
     }
 
     /// Get the current state of the IOAPIC
     fn get_ioapic_state(&self) -> Result<IoapicState> {
-        unimplemented!("get_ioapic_state for KvmKernelIrqChip is not yet implemented");
+        Ok(IoapicState::from(&self.vm.get_ioapic_state()?))
     }
 
     /// Set the current state of the IOAPIC
-    fn set_ioapic_state(&mut self, _state: &IoapicState) -> Result<()> {
-        unimplemented!("set_ioapic_state for KvmKernelIrqChip is not yet implemented");
+    fn set_ioapic_state(&mut self, state: &IoapicState) -> Result<()> {
+        self.vm.set_ioapic_state(&kvm_ioapic_state::from(state))
     }
 
     /// Get the current state of the specified VCPU's local APIC
@@ -41,17 +41,176 @@ impl IrqChipX86_64<KvmVcpu> for KvmKernelIrqChip {
     }
 
     /// Create a PIT (Programmable Interval Timer) for this VM.
+    /// The KvmKernelIrqchip creates the PIT by calling the KVM_CREATE_PIT2 KVM API. The
+    /// io_bus is not used in this case because KVM handles intercepting port-mapped io intended
+    /// for the PIT.
     fn create_pit(&mut self, _io_bus: &mut Bus) -> Result<()> {
-        unimplemented!("create_pit for KvmKernelIrqChip is not yet implemented");
+        self.vm.create_pit()
     }
 
-    /// Retrieves the state of the PIT.
+    /// Retrieves the state of the PIT. Gets the pit state via the KVM API.
     fn get_pit(&self) -> Result<PitState> {
-        unimplemented!("get_pit for KvmKernelIrqChip is not yet implemented");
+        Ok(PitState::from(&self.vm.get_pit_state()?))
+    }
+
+    /// Sets the state of the PIT. Sets the pit state via the KVM API.
+    fn set_pit(&mut self, state: &PitState) -> Result<()> {
+        self.vm.set_pit_state(&kvm_pit_state2::from(state))
+    }
+}
+
+#[cfg(test)]
+mod tests {
+
+    use hypervisor::kvm::{Kvm, KvmVm};
+    use sys_util::GuestMemory;
+
+    use crate::irqchip::{IrqChip, IrqChipX86_64, KvmKernelIrqChip};
+    use crate::Bus;
+
+    use hypervisor::{PicSelect, Vm, VmX86_64};
+
+    fn get_chip() -> (KvmKernelIrqChip, KvmVm) {
+        let kvm = Kvm::new().expect("failed to instantiate Kvm");
+        let mem = GuestMemory::new(&[]).unwrap();
+        let vm = KvmVm::new(&kvm, mem).expect("failed tso instantiate vm");
+        let vcpu = vm.create_vcpu(0).expect("failed to instantiate vcpu");
+
+        let mut chip = KvmKernelIrqChip::new(vm.try_clone().expect("failed to clone vm"), 1)
+            .expect("failed to instantiate KvmKernelIrqChip");
+
+        chip.add_vcpu(0, vcpu).expect("failed to add vcpu");
+
+        (chip, vm)
     }
 
-    /// Sets the state of the PIT.
-    fn set_pit(&mut self, _state: &PitState) -> Result<()> {
-        unimplemented!("set_pit for KvmKernelIrqChip is not yet implemented");
+    #[test]
+    fn get_pic() {
+        let (chip, vm) = get_chip();
+
+        let state = chip
+            .get_pic_state(PicSelect::Primary)
+            .expect("could not get pic state");
+
+        // Default is that no irq lines are asserted
+        assert_eq!(state.irr, 0);
+
+        // Assert Irq Line 0
+        vm.set_irq_line(0, true).expect("could not set irq line");
+
+        let state = chip
+            .get_pic_state(PicSelect::Primary)
+            .expect("could not get pic state");
+
+        // Bit 0 should now be 1
+        assert_eq!(state.irr, 1);
+    }
+
+    #[test]
+    fn set_pic() {
+        let (mut chip, _) = get_chip();
+
+        let mut state = chip
+            .get_pic_state(PicSelect::Primary)
+            .expect("could not get pic state");
+
+        // set bits 0 and 1
+        state.irr = 3;
+
+        chip.set_pic_state(PicSelect::Primary, &state)
+            .expect("could not set the pic state");
+
+        let state = chip
+            .get_pic_state(PicSelect::Primary)
+            .expect("could not get pic state");
+
+        // Bits 1 and 0 should now be 1
+        assert_eq!(state.irr, 3);
+    }
+
+    #[test]
+    fn get_ioapic() {
+        let (chip, vm) = get_chip();
+
+        let state = chip.get_ioapic_state().expect("could not get ioapic state");
+
+        // Default is that no irq lines are asserted
+        assert_eq!(state.current_interrupt_level_bitmap, 0);
+
+        // Default routing entries has routes 0..24 routed to vectors 0..24
+        for i in 0..24 {
+            // when the ioapic is reset by kvm, it defaults to all zeroes except the
+            // interrupt mask is set to 1, which is bit 16
+            assert_eq!(state.redirect_table[i].get(0, 64), 1 << 16);
+        }
+
+        // Assert Irq Line 1
+        vm.set_irq_line(1, true).expect("could not set irq line");
+
+        let state = chip.get_ioapic_state().expect("could not get ioapic state");
+
+        // Bit 1 should now be 1
+        assert_eq!(state.current_interrupt_level_bitmap, 2);
+    }
+
+    #[test]
+    fn set_ioapic() {
+        let (mut chip, _) = get_chip();
+
+        let mut state = chip.get_ioapic_state().expect("could not get ioapic state");
+
+        // set a vector in the redirect table
+        state.redirect_table[2].set_vector(15);
+        // set the irq line status on that entry
+        state.current_interrupt_level_bitmap = 4;
+
+        chip.set_ioapic_state(&state)
+            .expect("could not set the ioapic state");
+
+        let state = chip.get_ioapic_state().expect("could not get ioapic state");
+
+        // verify that get_ioapic_state returns what we set
+        assert_eq!(state.redirect_table[2].get_vector(), 15);
+        assert_eq!(state.current_interrupt_level_bitmap, 4);
+    }
+
+    #[test]
+    fn get_pit() {
+        let (mut chip, _) = get_chip();
+        let mut io_bus = Bus::new();
+        chip.create_pit(&mut io_bus).expect("failed to create pit");
+
+        let state = chip.get_pit().expect("failed to get pit state");
+
+        assert_eq!(state.flags, 0);
+        // assert reset state of pit
+        for i in 0..3 {
+            // initial count of 0 sets it to 0x10000;
+            assert_eq!(state.channels[i].count, 0x10000);
+            assert_eq!(state.channels[i].mode, 0xff);
+            assert_eq!(state.channels[i].gate, i != 2);
+        }
+    }
+
+    #[test]
+    fn set_pit() {
+        let (mut chip, _) = get_chip();
+        let mut io_bus = Bus::new();
+        chip.create_pit(&mut io_bus).expect("failed to create pit");
+
+        let mut state = chip.get_pit().expect("failed to get pit state");
+
+        // set some values
+        state.channels[0].count = 500;
+        state.channels[0].mode = 1;
+
+        // Setting the pit should initialize the one-shot timer
+        chip.set_pit(&state).expect("failed to set pit state");
+
+        let state = chip.get_pit().expect("failed to get pit state");
+
+        // check the values we set
+        assert_eq!(state.channels[0].count, 500);
+        assert_eq!(state.channels[0].mode, 1);
     }
 }