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authorAlyssa Ross <hi@alyssa.is>2020-03-14 00:17:26 +0000
committerAlyssa Ross <hi@alyssa.is>2020-06-15 09:36:51 +0000
commitc895e48de84f2a6b6f5b21e8037abef50e365a51 (patch)
tree77756aab4f39d7d36dd7c2040e982467335d08fe /devices/src/pci/pci_configuration.rs
parent4ccaa638e7e068e885ac2d9fedf7161ea8970514 (diff)
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get_device_bars
Diffstat (limited to 'devices/src/pci/pci_configuration.rs')
-rw-r--r--devices/src/pci/pci_configuration.rs7
1 files changed, 4 insertions, 3 deletions
diff --git a/devices/src/pci/pci_configuration.rs b/devices/src/pci/pci_configuration.rs
index ff2da1a..a0c92bd 100644
--- a/devices/src/pci/pci_configuration.rs
+++ b/devices/src/pci/pci_configuration.rs
@@ -6,6 +6,7 @@ use std::convert::TryInto;
 use std::fmt::{self, Display};
 
 use crate::pci::PciInterruptPin;
+use serde::{Deserialize, Serialize};
 use sys_util::warn;
 
 // The number of 32bit registers in the config space, 256 bytes.
@@ -178,20 +179,20 @@ pub struct PciConfiguration {
 }
 
 /// See pci_regs.h in kernel
-#[derive(Copy, Clone, Debug, Eq, PartialEq)]
+#[derive(Copy, Clone, Debug, Deserialize, Eq, PartialEq, Serialize)]
 pub enum PciBarRegionType {
     Memory32BitRegion = 0,
     IORegion = 0x01,
     Memory64BitRegion = 0x04,
 }
 
-#[derive(Copy, Clone, Debug, Eq, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq, Deserialize, Serialize)]
 pub enum PciBarPrefetchable {
     NotPrefetchable = 0,
     Prefetchable = 0x08,
 }
 
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, Deserialize, Serialize)]
 pub struct PciBarConfiguration {
     addr: u64,
     size: u64,