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author | Daniel Prilik <prilik@google.com> | 2019-04-08 15:11:32 -0700 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-22 12:28:11 -0700 |
commit | f82d6320e7192858553bb0e1b5464363d29a631a (patch) | |
tree | 6eb3d63187a4de998c0685b5aa84822266a0cab5 /crosvm_plugin | |
parent | 622788fb46b62a59bf39163f690f1ac99a5aee06 (diff) | |
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aarch64: add PCI device memory region to fdt
The device memory SystemAllocator allocates device addresses past the end of physical memory. If a device tries to actually use this address to register a new PCI BAR, the kernel will fail with a "can't claim BAR, no compatible bridge window" error. On ARM, the kernel must be informed of where PCI bars are allowed to be allocated through the Device Tree. This CL adds a new PCI memory region to the fdt for device memory. BUG=chromium:936567 TEST=see CL:1493014. Run on ARM. Change-Id: I0faa6f7082ae53f7a792cec53a21adba109bc00d Reviewed-on: https://chromium-review.googlesource.com/1558940 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Diffstat (limited to 'crosvm_plugin')
0 files changed, 0 insertions, 0 deletions