devices: pci: support level-triggered interrupts

Register the irqfd with resample support so that we can correctly
emulate level-triggered interrupts.  This requires each PciDevice to
listen for interrupt_resample events and re-assert the IRQ eventfd if it
should still be active.

BUG=None
TEST=Boot crosvm on x86-64 and arm devices

Change-Id: I5cf8d1d1705cf675b453962c00d2d606801fee91
Signed-off-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1298654
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>

1 files changed, 4 insertions, 2 deletions

diff --git a/arch/src/lib.rs b/arch/src/lib.rs
index 565227a..455bd0e 100644
--- a/arch/src/lib.rs
+++ b/arch/src/lib.rs
@@ -149,6 +149,7 @@ pub fn generate_pci_root(
         syslog::push_fds(&mut keep_fds);
 
         let irqfd = EventFd::new().map_err(DeviceRegistrationError::EventFdCreate)?;
+        let irq_resample_fd = EventFd::new().map_err(DeviceRegistrationError::EventFdCreate)?;
         let irq_num = resources
             .allocate_irq()
             .ok_or(DeviceRegistrationError::AllocateIrq)? as u32;
@@ -159,10 +160,11 @@ pub fn generate_pci_root(
             3 => PciInterruptPin::IntD,
             _ => panic!(""), // Obviously not possible, but the compiler is not smart enough.
         };
-        vm.register_irqfd(&irqfd, irq_num)
+        vm.register_irqfd_resample(&irqfd, &irq_resample_fd, irq_num)
             .map_err(DeviceRegistrationError::RegisterIrqfd)?;
         keep_fds.push(irqfd.as_raw_fd());
-        device.assign_irq(irqfd, irq_num, pci_irq_pin);
+        keep_fds.push(irq_resample_fd.as_raw_fd());
+        device.assign_irq(irqfd, irq_resample_fd, irq_num, pci_irq_pin);
         pci_irqs.push((dev_idx as u32, pci_irq_pin));
 
         let ranges = device