diff options
author | Jingkui Wang <jkwang@google.com> | 2018-07-26 14:32:42 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-07-27 19:11:15 -0700 |
commit | c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6 (patch) | |
tree | 2a84143313115dd1f0db5fc003eac4925075a4b1 | |
parent | 448516e3f985dd13fb5cd16f2c9efbcf097f9fa5 (diff) | |
download | crosvm-c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6.tar crosvm-c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6.tar.gz crosvm-c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6.tar.bz2 crosvm-c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6.tar.lz crosvm-c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6.tar.xz crosvm-c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6.tar.zst crosvm-c1ce54a9dd832ec8c71e49b09b1e4e7a67ede7b6.zip |
pci: Add serial bus subclass
Add serial bus subclass BUG=chromium:831850 TEST=cargo test Change-Id: Iffd7a27b5cb423c928f0108b16fb58558cf7bcd4 Reviewed-on: https://chromium-review.googlesource.com/1152212 Commit-Ready: Jingkui Wang <jkwang@google.com> Tested-by: Jingkui Wang <jkwang@google.com> Reviewed-by: Dylan Reid <dgreid@chromium.org>
-rw-r--r-- | devices/src/pci/pci_configuration.rs | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/devices/src/pci/pci_configuration.rs b/devices/src/pci/pci_configuration.rs index 4b4c427..cf23e60 100644 --- a/devices/src/pci/pci_configuration.rs +++ b/devices/src/pci/pci_configuration.rs @@ -100,6 +100,22 @@ impl PciSubclass for PciBridgeSubclass { } } +/// Subclass of the SerialBus +#[allow(dead_code)] +#[derive(Copy, Clone)] +pub enum PciSerialBusSubClass { + Firewire = 0x00, + ACCESSbus = 0x01, + SSA = 0x02, + USB = 0x03, +} + +impl PciSubclass for PciSerialBusSubClass { + fn get_register_value(&self) -> u8 { + *self as u8 + } +} + /// Contains the configuration space of a PCI node. /// See the [specification](https://en.wikipedia.org/wiki/PCI_configuration_space). /// The configuration space is accessed with DWORD reads and writes from the guest. |